HD64F2638F20J Datasheet, PDF (1038/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 24 Electrical Characteristics
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
(3) Bus Timing
Table 24-6 lists the bus timing.
Table 24-6 Bus Timing
Conditions: V_CC = 4.5 V to 5.5 V, PWMV_CC = 4.5 V to 5.5 V, AV_CC = 4.5 V to 5.5 V,
V_ref = 4.5 V to AV_CC, V_SS = PWMV_SS = PLLV_SS = AV_SS = 0 V,
T_a = –20°C to +75°C (regular specifications), T_a = –40°C to +85°C (wide-range
specifications)
Item
Address delay time
Address setup time
Address hold time
AS delay time
RD delay time 1
RD delay time 2
Read data setup time
Read data hold time
Read data access time1
Read data access time2
Read data access time3
Read data access time 4
Read data access time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
Condition
Symbol Min.
Max.
tAD
—
35
tAS
0.5 × tcyc – 20 —
tAH
0.5 × tcyc – 15 —
tASD
—
20
tRSD1
—
20
tRSD2
—
20
tRDS
20
tRDH
0
tACC1
—
tACC2
—
tACC3
—
tACC4
—
tACC5
—
tWRD1
—
—
—
1.0 × tcyc – 48
1.5 × tcyc – 45
2.0 × tcyc – 45
2.5 × tcyc – 45
3.0 × tcyc – 50
20
tWRD2
tWSW1
tWSW2
tWDD
tWDS
tWDH
—
20
1.0 × tcyc – 20 —
1.5 × tcyc – 20 —
—
30
0.5 × tcyc – 20 —
0.5 × tcyc – 10 —
Unit Test Conditions
ns Figure 24-13 to
ns ^{Figure 24-17}
ns
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Page 988 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010