HD64F2638F20J Datasheet, PDF (1374/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
DTVECR—DTC Vector Register
H'FE1F
DTC
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
SWDTE DTVEC6 DTVEC5 DTVEC4 DTVEC3 DTVEC2 DTVEC1 DTVEC0
0
0
0
0
0
0
0
0
R/(W)*¹ R/W*² R/W*² R/W*² R/W*² R/W*² R/W*² R/W*²
Set vector number for DTC software activation
DTC Software Activation Enable
0 DTC software activation is disabled
[Clearing conditions]
• When the DISEL bit is 0 and the specified number of transfers have
not ended
• When 0 is written to DISEL bit after a software-activated data transfer
end interrupt (SWDTEND) request has been sent to the CPU.
1 DTC software activation is enabled
[Holding conditions]
• When data transfer ends with the DISEL bit set to 1
• When the specified number of transfers end
• During software-activated deta transfer
Notes: This register is not available in the H8S/2635 Group.
1. Only 1 can be written to the SWDTE bit.
2. Bits DTVEC6 to DTVEC0 can be written to when SWDTE = 0.
Page 1324 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010