HD64F2638F20J Datasheet, PDF (1377/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Appendix B Internal I/O Register
NDERH—Next Data Enable Register H
H'FE28
PPG
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
NDER15 NDER14 NDER13 NDER12 NDER11 NDER10 NDER9
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
NDER8
0
R/W
Next Data Enable
0 Pulse outputs PO15 to PO8 are disabled
(NDR15 to NDR8 are not transferred to POD15 to POD8)
1 Pulse outputs PO15 to PO8 are enabled
(NDR15 to NDR8 are transferred to POD15 to POD8)
Note: This register is not available in the H8S/2635 Group.
NDERL—Next Data Enable Register L
H'FE29
PPG
Bit
Initial value
Read/Write
7
NDER7
0
R/W
6
NDER6
0
R/W
5
NDER5
0
R/W
4
NDER4
0
R/W
3
NDER3
0
R/W
2
NDER2
0
R/W
1
NDER1
0
R/W
0
NDER0
0
R/W
Next Data Enable
0 Pulse outputs PO7 to PO0 are disabled
(NDR7 to NDR0 are not transferred to POD7 to POD0
1 Pulse outputs PO7 to PO0 are enabled
(NDR7 to NDR0 are transferred to POD7 to POD0)
Note: This register is not available in the H8S/2635 Group.
PODRH—Output Data Register H
H'FE2A
PPG
Bit
Initial value
Read/Write
7
POD15
0
R/(W)*
6
POD14
0
R/(W)*
5
POD13
0
R/(W)*
4
POD12
0
R/(W)*
3
POD11
0
R/(W)*
2
POD10
0
R/(W)*
1
POD9
0
R/(W)*
0
POD8
0
R/(W)*
Notes: This register is not available in the H8S/2635 Group.
* A bit that has been set for pulse output by NDER is read-only.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1327 of 1458