HD64F2638F20J Datasheet, PDF (747/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 17 A/D Converter
Table 17-4 A/D Conversion Time (Single Mode)
CKS1 = 0
CKS1 = 0
CKS0 = 0
CKS0 = 1
CKS0 = 0
CKS0 = 1
Item
Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max
A/D conversion start delay tD
18 — 33 10 — 17 6 — 9 4 — 5
Input sampling time
tSPL
— 127 — — 63 — — 31 — — 15 —
A/D conversion time
tCONV 515 — 530 259 — 266 131 — 134 67 — 68
Note: Values in the table are the number of states.
Table 17-5 A/D Conversion Time (Scan Mode)
CKS1
0
1
CKS0
0
1
0
1
Conversion Time (State)
512 (Fixed)
256 (Fixed)
128 (Fixed)
64 (Fixed)
17.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as if the ADST bit has been set to 1 by software. Figure 17-6 shows the
timing.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 697 of 1458