HD64F2638F20J Datasheet, PDF (265/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 8 Data Transfer Controller (DTC)
φ
DTC activation
request
DTC
request
Address
Vector read
Data transfer
Read Write
Data transfer
Read Write
Transfer
information
read
Transfer Transfer
information information
write
read
Transfer
information
write
Figure 8-12 DTC Operation Timing (Example of Chain Transfer)
8.3.10 Number of DTC Execution States
Table 8-8 lists execution statuses for a single DTC data transfer, and table 8-9 shows the number
of states required for each execution status.
Table 8-8 DTC Execution Statuses
Mode
Vector Read
I
Register Information
Read/Write
Data Read
J
K
Normal
1
6
1
Repeat
1
6
1
Block transfer 1
6
N
N: Block size (initial setting of CRAH and CRAL)
Data Write
L
1
1
N
Internal
Operations
M
3
3
3
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 215 of 1458