HD64F2638F20J Datasheet, PDF (588/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Smart Card Interface
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Interrupt Operation (Except Block Transfer Mode): There are three interrupt sources in smart
card interface mode: transmit data empty interrupt (TXI) requests, transfer error interrupt (ERI)
requests, and receive data full interrupt (RXI) requests. The transmit end interrupt (TEI) request is
not used in this mode.
When the TEND flag in SSR is set to 1, a TXI interrupt request is generated.
When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated.
When any of flags ORER, PER, and ERS in SSR is set to 1, an ERI interrupt request is generated.
The relationship between the operating states and interrupt sources is shown in table 14-8.
Note: For block transfer mode, see section 13.4, SCI Interrupts.
Table 14-8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit Mode Normal
operation
Error
Receive Mode Normal
operation
Error
Flag
TEND
ERS
RDRF
PER, ORER
Enable Bit
TIE
RIE
RIE
RIE
Interrupt
Source
TXI
ERI
RXI
ERI
DTC Activation
Possible
Not possible
Possible
Not possible
Data Transfer Operation by DTC^*: In smart card mode, as with the normal SCI, transfer can be
carried out using the DTC. In a transmit operation, the TDRE flag is also set to 1 at the same time
as the TEND flag in SSR, and a TXI interrupt is generated. If the TXI request is designated
beforehand as a DTC activation source, the DTC will be activated by the TXI request, and transfer
of the transmit data will be carried out. The TDRE and TEND flags are automatically cleared to 0
when data transfer is performed by the DTC. In the event of an error, the SCI retransmits the same
data automatically. During this period, TEND remains cleared to 0 and the DTC is not activated.
Therefore, the SCI and DTC will automatically transmit the specified number of bytes, including
retransmission in the event of an error. However, the ERS flag is not cleared automatically when
an error occurs, and so the RIE bit should be set to 1 beforehand so that an ERI request will be
generated in the event of an error, and the ERS flag will be cleared.
When performing transfer using the DTC, it is essential to set and enable the DTC before carrying
out SCI setting. For details of the DTC setting procedures, see section 8, Data Transfer Controller
(DTC).
Page 538 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010