HD64F2638F20J Datasheet, PDF (239/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 8 Data Transfer Controller (DTC)
Section 8 Data Transfer Controller (DTC)
Note: The H8S/2635 Group is not equipped with a DTC.
8.1 Overview
The chip includes a data transfer controller (DTC). The DTC can be activated by an interrupt or
software, to transfer data.
8.1.1 Features
• Transfer possible over any number of channels
⎯ Transfer information is stored in memory
⎯ One activation source can trigger a number of data transfers (chain transfer)
• Wide range of transfer modes
⎯ Normal, repeat, and block transfer modes available
⎯ Incrementing, decrementing, and fixing of source and destination addresses can be selected
• Direct specification of 16-Mbyte address space possible
⎯ 24-bit transfer source and destination addresses can be specified
• Transfer can be set in byte or word units
• A CPU interrupt can be requested for the interrupt that activated the DTC
⎯ An interrupt request can be issued to the CPU after one data transfer ends
⎯ An interrupt request can be issued to the CPU after the specified data transfers have
completely ended
• Activation by software is possible
• Module stop mode can be set
⎯ The initial setting enables DTC registers to be accessed. DTC operation is halted by setting
module stop mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 189 of 1458