HD64F2638F20J Datasheet, PDF (121/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 2 CPU
2.9.3 On-Chip Supporting Module Access Timing
The on-chip supporting modules are accessed in two states. The data bus is either 8 bits or 16 bits
wide, depending on the particular internal I/O register being accessed. Figure 2-19 shows the
access timing for the on-chip supporting modules. Figure 2-20 shows the pin states.
Bus cycle
T₁
T₂
φ
Internal address bus
Address
Read
access
Internal read signal
Internal data bus
Write
access
Internal write signal
Internal data bus
Read data
Write data
Figure 2-19 On-Chip Supporting Module Access Cycle
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 71 of 1458