HD64F2638F20J Datasheet, PDF (338/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 9 I/O Ports
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
9.10.2 Register Configuration
Table 9-18 shows the port E register configuration.
Table 9-18 Port E Registers
Name
Abbreviation R/W
Port E data direction register
PEDDR
W
Port E data register
PEDR
R/W
Port E register
PORTE
R
Port E MOS pull-up control register PEPCR
R/W
Note: * Lower 16 bits of the address.
Initial Value
H'00
H'00
Undefined
H'00
Address^*
H'FE3D
H'FF0D
H'FFBD
H'FE44
Port E Data Direction Register (PEDDR)
Bit
:
7
6
5
4
3
2
1
0
PE7DDR PE6DDR PE5DDR PE4DDR PE3DDR PE2DDR PE1DDR PE0DDR
Initial value :
0
0
0
0
0
0
0
0
R/W
:W
W
W
W
W
W
W
W
PEDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port E. PEDDR cannot be read; if it is, an undefined value will be read.
PEDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state by
a manual reset or in software standby mode.
• Modes 4 to 6
When 8-bit bus mode has been selected, port E pins function as I/O ports. Setting a PEDDR bit
to 1 makes the corresponding port E pin an output port, while clearing the bit to 0 makes the
pin an input port.
When 16-bit bus mode has been selected, the input/output direction specification by PEDDR is
ignored, and port E is designated for data I/O.
For details of 8-bit and 16-bit bus modes, see section 7, Bus Controller.
• Mode 7
Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing the
bit to 0 makes the pin an input port.
Page 288 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010