HD64F2638F20J Datasheet, PDF (1390/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
TIER3—Timer Interrupt Enable Register 3
H'FE84
TPU3
Bit
7
6
TTGE
⎯
Initial value
0
1
Read/Write R/W
⎯
5
4
3
2
1
0
⎯ TCIEV TGIED TGIEC TGIEB TGIEA
0
0
0
0
0
0
⎯
R/W R/W R/W R/W R/W
TGR Interrupt Enable A
0 Interrupt requests (TGIA) by TGFA bit disabled
1 Interrupt requests (TGIA) by TGFA bit enabled
TGR Interrupt Enable B
0 Interrupt requests (TGIB) by TGFB bit disabled
1 Interrupt requests (TGIB) by TGFB bit enabled
TGR Interrupt Enable C
0 Interrupt requests (TGIC) by TGFC bit disabled
1 Interrupt requests (TGIC) by TGFC bit enabled
TGR Interrupt Enable D
0 Interrupt requests (TGID) by TGFD bit disabled
1 Interrupt requests (TGID) by TGFD bit enabled
Overflow Interrupt Enable
0 Interrupt requests (TCIV) by TCFV disabled
1 Interrupt requests (TCIV) by TCFV enabled
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1 A/D conversion start request generation enabled
Page 1340 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010