HD64F2638F20J Datasheet, PDF (938/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 21C ROM
(H8S/2635 Group)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
21C.10.2 Software Protection
Software protection can be implemented by setting the SWE bit in FLMCR1, erase block register
1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register
(RAMER). When software protection is in effect, setting the P or E bit in flash memory control
register 1 (FLMCR1), does not cause a transition to program mode or erase mode (See table
21C-12).
Table 21C-12 Software Protection
Functions
Item
Description
Program Erase
SWE bit protection • Setting bit SWE in FLMCR1 to 0 will place Yes
Yes
area on-chip flash memory in the program/
erase-protected state (Execute the program
in the on-chip RAM, external memory).
Block specification • Erase protection can be set for individual —
Yes
protection
blocks by settings in erase block register 1
(EBR1) and erase block register 2 (EBR2).
• Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Emulation protection • Setting the RAMS bit to 1 in the RAM
Yes
Yes
emulation register (RAMER) places all blocks
in the program/erase-protected state.
Page 888 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010