HD64F2638F20J Datasheet, PDF (473/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 11 Programmable Pulse Generator (PPG)
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. The NDR contents should not be altered during the interval from compare
match B to compare match A (the non-overlap margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DTC. Note, however, that the next data must
be written before the next compare match B occurs.
Figure 11-11 shows the timing of this operation.
Compare match A
Compare match B
NDR
Write to NDR
Write to NDR
PODR
0 output 0/1 output
0 output 0/1 output
Write to NDR
Do not write ^here
to NDR here
Write to NDR
Do not write ^here
to NDR here
Figure 11-11 Non-Overlapping Operation and NDR Write Timing
REJ09B0103-0800 Rev. 8.00
May 28, 2010
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