HD64F2638F20J Datasheet, PDF (37/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

11.2.8 Module Stop Control Register A (MSTPCRA) ................................................... 412
11.3 Operation .......................................................................................................................... 413
11.3.1 Overview.............................................................................................................. 413
11.3.2 Output Timing...................................................................................................... 414
11.3.3 Normal Pulse Output............................................................................................ 415
11.3.4 Non-Overlapping Pulse Output............................................................................ 417
11.3.5 Inverted Pulse Output .......................................................................................... 420
11.3.6 Pulse Output Triggered by Input Capture ............................................................ 421
11.4 Usage Notes ...................................................................................................................... 422
Section 12 Watchdog Timer............................................................................................. 425
12.1 Overview........................................................................................................................... 425
12.1.1 Features................................................................................................................ 425
12.1.2 Block Diagram..................................................................................................... 426
12.1.3 Pin Configuration................................................................................................. 428
12.1.4 Register Configuration......................................................................................... 428
12.2 Register Descriptions ........................................................................................................ 429
12.2.1 Timer Counter (TCNT)........................................................................................ 429
12.2.2 Timer Control/Status Register (TCSR)................................................................ 430
12.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 436
12.2.4 Notes on Register Access..................................................................................... 437
12.3 Operation .......................................................................................................................... 439
12.3.1 Watchdog Timer Operation ................................................................................. 439
12.3.2 Interval Timer Operation ..................................................................................... 441
12.3.3 Timing of Setting Overflow Flag (OVF) ............................................................. 441
12.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF) ......................... 442
12.4 Interrupts ........................................................................................................................... 443
12.5 Usage Notes ...................................................................................................................... 443
12.5.1 Contention between Timer Counter (TCNT) Write and Increment ..................... 443
12.5.2 Changing Value of PSS* and CKS2 to CKS0 ..................................................... 444
12.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode................ 444
12.5.4 Internal Reset in Watchdog Timer Mode............................................................. 444
12.5.5 OVF Flag Clearing in Interval Timer Mode ........................................................ 444
Section 13 Serial Communication Interface (SCI) .................................................... 445
13.1 Overview........................................................................................................................... 445
13.1.1 Features................................................................................................................ 445
13.1.2 Block Diagram..................................................................................................... 447
13.1.3 Pin Configuration................................................................................................. 448
13.1.4 Register Configuration......................................................................................... 449
REJ09B0103-0800 Rev. 8.00
May 28, 2010
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