HD64F2638F20J Datasheet, PDF (202/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
7.2 Register Descriptions
7.2.1 Bus Width Control Register (ABWCR)
Bit
:
Modes 5 to 7
Initial value :
RW
:
Mode 4
Initial value :
RW
:
7
6
5
4
3
2
1
0
ABW7 ABW6 ABW5 ABW4 ABW3 ABW2 ABW1 ABW0
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
ABWCR is an 8-bit readable/writable register that designates each area for either 8-bit access or
16-bit access.
ABWCR sets the data bus width for the external memory space. The bus width for on-chip
memory and internal I/O registers is fixed regardless of the settings in ABWCR.
After a reset and in hardware standby mode, ABWCR is initialized to H'FF in modes 5, 6, 7, and
to H'00 in mode 4. It is not initialized in software standby mode.
Bits 7 to 0—Area 7 to 0 Bus Width Control (ABW7 to ABW0): These bits select whether the
corresponding area is to be designated for 8-bit access or 16-bit access.
Bit n
ABWn
0
1
Description
Area n is designated for 16-bit access
Area n is designated for 8-bit access
(n = 7 to 0)
Page 152 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010