HD64F2638F20J Datasheet, PDF (452/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 11 Programmable Pulse Generator (PPG)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
11.1.4 Registers
Table 11-2 summarizes the PPG registers.
Table 11-2 PPG Registers
Name
Abbreviation R/W
Initial Value Address^*1
PPG output control register
PCR
R/W
H'FF
H'FE26
PPG output mode register
PMR
R/W
H'F0
H'FE27
Next data enable register H
Next data enable register L^*4
Output data register H
Output data register L^*4
Next data register H
Next data register L^*4
NDERH
NDERL
PODRH
PODRL
NDRH
NDRL
R/W
R/W
R/(W)^*2
R/(W)^*2
R/W
H'00
H'00
H'00
H'00
H'00
R/W
H'00
H'FE28
H'FE29
H'FE2A
H'FE2B
H'FE2C^*3
H'FE2E
H'FE2D^*3
H'FE2F
Port 1 data direction register
P1DDR
W
H'00
H'FE30
Module stop control register A
MSTPCRA
R/W
H'3F
H'FDE8
Notes: 1. Lower 16 bits of the address.
2. Bits used for pulse output cannot be written to.
3. When the same output trigger is selected for pulse output groups 2 and 3 by the PCR
setting, the NDRH address is H'FE2C. When the output triggers are different, the NDRH
address is H'FE2E for group 2 and H'FE2C for group 3.
Similarly, when the same output trigger is selected for pulse output groups 0 and 1 by
the PCR setting, the NDRL address is H'FE2D. When the output triggers are different,
the NDRL address is H'FE2F for group 0 and H'FE2D for group 1.
4. The chip has no pins corresponding to pulse output groups 0 and 1.
Page 402 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010