HD64F2638F20J Datasheet, PDF (580/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 14 Smart Card Interface
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
14.3.5 Clock
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1,
CKS0, BCP1 and BCP0 bits in SMR. The formula for calculating the bit rate is as shown below.
Table 14-5 shows some sample bit rates.
If clock output is selected by setting CKE0 to 1, a clock is output from the SCK pin. The clock
frequency is determined by the bit rate and the setting of bits BCP1 and BCP0.
B=
φ
× 10⁶
S × 2²ⁿ⁺¹ × (N + 1)
Where: N = Value set in BRR (0 ≤ N ≤ 255)
B = Bit rate (bit/s)
φ = Operating frequency (MHz)
n = See table 14-4
S = Number of internal clocks in 1-bit period, set by BCP1 and BCP0
Table 14-4 Correspondence between n and CKS1, CKS0
n
CKS1
CKS0
0
0
0
1
1
2
1
0
3
1
Table 14-5 Examples of Bit Rate B (bit/s) for Various BRR Settings
(When n = 0 and S = 372)
φ (MHz)
N
10.00
10.714 13.00
14.285 16.00
0
13441
14400
17473
19200
21505
1
6720
7200
8737
9600
10753
2
4480
4800
5824
6400
7168
Note: Bit rates are rounded to the nearest whole number.
18.00
24194
12097
8065
20.00
26882
13441
8961
Page 530 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010