HD64F2638F20J Datasheet, PDF (549/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 13 Serial Communication Interface (SCI)
Serial clock
Transfer direction
Serial data
Bit 0 Bit 1
Bit 7 Bit 0 Bit 1
Bit 6 Bit 7
TDRE
TEND
TXI interrupt
request generated
Data written to TDR TXI interrupt
and TDRE flag
request generated
cleared to 0 in TXI
interrupt service routine
1 frame
TEI interrupt
request generated
Figure 13-17 Example of SCI Operation in Transmission
• Serial data reception (clocked synchronous mode)
Figure 13-18 shows a sample flowchart for serial reception.
The following procedure should be used for serial data reception.
When changing the operating mode from asynchronous to clocked synchronous, be sure to
check that the ORER, PER, and FER flags are all cleared to 0.
The RDRF flag will not be set if the FER or PER flag is set to 1, and neither transmit nor
receive operations will be possible.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 499 of 1458