HD64F2638F20J Datasheet, PDF (478/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 12 Watchdog Timer
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
12.1.3 Pin Configuration
There are no pins related to the WDT.
12.1.4 Register Configuration
The WDT has five registers, as summarized in table 12-1. These registers control clock selection,
WDT mode switching, and the reset signal.
Table 12-1 WDT Registers
Channel Name
Abbreviation R/W
Address^*1
Initial Value Write^*2 Read
0
Timer control/status register 0 TCSR0
R/(W)^*3 H'18
H'FF74 H'FF74
Timer counter 0
TCNT0
R/W H'00
Reset control/status register RSTCSR0 R/(W)^*3 H'1F
1
Timer control/status register 1 TCSR1
R/(W)^*3 H'00
H'FF74 H'FF75
H'FF76 H'FF77
H'FFA2 H'FFA2
Timer counter 1
TCNT1
R/W H'00
H'FFA2 H'FFA3
Notes: 1. Lower 16 bits of the address.
2. For details of write operations, see section 12.2.4, Notes on Register Access.
3. Only a write of 0 is permitted to bit 7, to clear the flag.
Page 428 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010