HD64F2638F20J Datasheet, PDF (1487/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
*1
PA1
*2
Appendix C I/O Port Block Diagrams
Reset
R
Q
D
PA1PCR
C
WPCRA
RPCRA
Smart card
mode signal
TxD output
TxD output
enable
Modes 4/5/6
Address
enable
Reset
R
Q
D
PA1DDR
C
WDDRA
Reset
R
Q
D
PA1DR
C
WDRA
Reset
R
Q
D
PA1ODR
C
WODRA
RODRA
RDRA
RPORA
Legend:
WDDRA: Write to PADDR
WDRA: Write to PADR
WODRA: Write to PAODR
WPCRA: Write to PAPCR
RDRA: Read PADR
RPORA: Read port A
RODRA: Read PAODR
RPCRA: Read PAPCR
Notes: 1. Output enable signal
2. Open drain control signal
Figure C-5 (b) Port A Block Diagram (Pin PA1)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1437 of 1458