HD64F2638F20J Datasheet, PDF (865/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 21B ROM
(H8S/2638 Group, H8S/2639 Group, H8S/2630 Group)
Bits 7 and 6—Reserved: These bits always read 0.
Bits 5 and 4—Reserved: Only 0 may be written to these bits.
Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3
RAMS
0
1
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
(Initial value)
Bits 2 to 0—Flash Memory Area Selection: These bits are used together with bit 3 to select the
flash memory area to be overlapped with RAM. (See table 21B-8.)
Table 21B-8 Flash Memory Area Divisions
Addresses
H'FFD000 to H'FFDFFF
H'000000 to H'000FFF
H'001000 to H'001FFF
H'002000 to H'002FFF
H'003000 to H'003FFF
H'004000 to H'004FFF
H'005000 to H'005FFF
H'006000 to H'006FFF
H'007000 to H'007FFF
Block Name
RAMS
RAM area 4 kbytes 0
EB0 (4 kbytes)
1
EB1 (4 kbytes)
1
EB2 (4 kbytes)
1
EB3 (4 kbytes)
1
EB4 (4 kbytes)
1
EB5 (4 kbytes)
1
EB6 (4 kbytes)
1
EB7 (4 kbytes)
1
RAM1
*
0
0
0
0
1
1
1
1
RAM1 RAM0
*
*
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
*: Don't care
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 815 of 1458