HD64F2638F20J Datasheet, PDF (157/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 5 Interrupt Controller
5.1.3 Pin Configuration
Table 5-1 summarizes the pins of the interrupt controller.
Table 5-1 Interrupt Controller Pins
Name
Symbol
Nonmaskable interrupt NMI
I/O
Input
External interrupt
requests 5 to 0
IRQ5 to IRQ0 Input
Function
Nonmaskable external interrupt; rising or
falling edge can be selected
Maskable external interrupts; rising, falling, or
both edges, or level sensing, can be selected
5.1.4 Register Configuration
Table 5-2 summarizes the registers of the interrupt controller.
Table 5-2 Interrupt Controller Registers
Name
Abbreviation R/W
System control register
SYSCR
R/W
IRQ sense control register H ISCRH
R/W
IRQ sense control register L ISCRL
R/W
IRQ enable register
IER
IRQ status register
ISR
R/W
R/(W)^*2
Interrupt priority register A
IPRA
R/W
Interrupt priority register B
IPRB
R/W
Interrupt priority register C
IPRC
R/W
Interrupt priority register D
IPRD
R/W
Interrupt priority register E
IPRE
R/W
Interrupt priority register F
IPRF
R/W
Interrupt priority register G
IPRG
R/W
Interrupt priority register H
IPRH
R/W
Interrupt priority register J
IPRJ
R/W
Interrupt priority register K
IPRK
R/W
Interrupt priority register L
IPRL
R/W
Interrupt priority register M
IPRM
R/W
Notes: 1. Lower 16 bits of the address.
2. Can only be written with 0 for flag clearing.
Initial Value
H'01
H'00
H'00
H'00
H'00
H'77
H'77
H'77
H'77
H'77
H'77
H'77
H'77
H'77
H'77
H'77
H'77
Address^*1
H'FDE5
H'FE12
H'FE13
H'FE14
H'FE15
H'FEC0
H'FEC1
H'FEC2
H'FEC3
H'FEC4
H'FEC5
H'FEC6
H'FEC7
H'FEC9
H'FECA
H'FECB
H'FECC
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 107 of 1458