HD64F2638F20J Datasheet, PDF(774/1512 Page) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

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HD64F2638F20J Datasheet, PDF (774/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

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Section 19 Motor Control PWM Timer

H8S/2639, H8S/2638, H8S/2636,

H8S/2630, H8S/2635 Group

19.2.6 PWM Duty Registers 1A, 1C, 1E, 1G (PWDTR1A, 1C, 1E, 1G)

Bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

â â â OTS â â DT9 DT8 DT7 DT6 DT5 DT4 DT3 DT2 DT1 DT0

Initial value 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0

Read/Write â â â â â â â â â â â â â â â â

There are four PWDTR1x registers (PWDTR1A, 1C, 1E, 1G). PWDTR1A is used for outputs

PWM1A and PWM1B, PWDTR1C for outputs PWM1C and PWM1D, PWDTR1E for outputs

PWM1E and PWM1F, and PWDTR1G for outputs PWM1G and PWM1H.

PWDTR1 cannot be read or written to directly. When a PWCYR1 compare match occurs, data is

transferred from buffer register 1 (PWBFR1) to PWDTR1.

PWDTR1x is initialized to H'EC00 when the counter start bit (CST) in PWCR1 is cleared to 0,

and also upon reset and in standby mode, watch mode*, subactive mode*, subsleep mode*, and

module stop mode.

Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the

U-mask and W-mask versions, and H8S/2635 Group only.

These functions cannot be used with the other versions.

Bits 15 to 13âReserved: These bits cannot be read from or written to.

Page 724 of 1458

REJ09B0103-0800 Rev. 8.00

May 28, 2010

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