HD64F2638F20J Datasheet, PDF (210/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
7.2.5 Bus Control Register L (BCRL)
Bit
:
7
6
5
⎯
⎯
⎯
Initial value :
0
0
0
R/W
:
R/W
R/W
⎯
4
3
2
1
0
⎯
⎯
⎯
WDBE
⎯
0
1
0
0
0
R/W
R/W
R/W
R/W
R/W
BCRL is an 8-bit readable/writable register that performs selection of the external bus-released
state protocol, enabling or disabling of the write data buffer function.
BCRL is initialized to H'08 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 and 6—Reserved: Only 0 should be written to these bits.
Bit 5—Reserved: It is always read as 0. Cannot be written to.
Bit 4—Reserved: Only 0 should be written to this bit.
Bit 3—Reserved: Only 1 should be written to this bit.
Bit 2—Reserved: Only 0 should be written to this bit.
Bit 1—Write Data Buffer Enable (WDBE): This bit selects whether or not to use the write
buffer function in the external write cycle.
Bit 1
WDBE
0
1
Description
Write data buffer function not used
Write data buffer function used
(Initial value)
Bit 0—Reserved: Only 0 should be written to these bits.
Page 160 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010