HD64F2638F20J Datasheet, PDF (183/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 5 Interrupt Controller
5.6 DTC Activation by Interrupt
Note: The DTC is not implemented in the H8S/2635 Group.
5.6.1 Overview
The DTC can be activated by an interrupt. In this case, the following options are available:
• Interrupt request to CPU
• Activation request to DTC
• Selection of a number of the above
For details of interrupt requests that can be used with to activate the DTC, see section 8, Data
Transfer Controller (DTC).
5.6.2 Block Diagram
Figure 5-9 shows a block diagram of the DTC interrupt controller.
Interrupt
request
IRQ
interrupt
Interrupt source
On-chip
clear signal
supporting
module
Selection
circuit
Select
signal
Clear signal
DTCER
DTVECR
SWDTE
clear signal
Control logic
Interrupt controller
Determination of
priority
DTC activation
request vector
number
Clear signal
CPU interrupt
request vector
number
I, I2 to I0
DTC
CPU
Figure 5-9 Interrupt Control for DTC
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 133 of 1458