HD64F2638F20J Datasheet, PDF (749/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 17 A/D Converter
17.6 Usage Notes
The following points should be noted when using the A/D converter.
Setting Range of Analog Power Supply and Other Pins:
(1) Analog input voltage range
The voltage applied to analog input pin ANn during A/D conversion should be in the range
AVSS ≤ ANn ≤ Vref.
(2) Relation between AVCC, AVSS and VCC, VSS
As the relationship between AVSS and VSS, set AVSS = VSS. If the A/D converter is not
used, set AVCC = VCC, and do not leave the AVCC and AVSS pins open or no account.
(3) Vref input range
The analog reference voltage input at the Vref pin set in the range Vref ≤ AVCC.
If conditions (1), (2), and (3) above are not met, the reliability of the device may be adversely
affected.
Notes on Board Design: In board design, digital circuitry and analog circuitry should be as
mutually isolated as possible, and layout in which digital circuit signal lines and analog circuit
signal lines cross or are in close proximity should be avoided as far as possible. Failure to do so
may result in incorrect operation of the analog circuitry due to inductance, adversely affecting A/D
conversion values.
Also, digital circuitry must be isolated from the analog input signals (AN0 to AN11), analog
reference power supply (Vref), and analog power supply (AVCC) by the analog ground (AVSS).
Also, the analog ground (AVSS) should be connected at one point to a stable digital ground (VSS)
on the board.
Notes on Noise Countermeasures: A protection circuit connected to prevent damage due to an
abnormal voltage such as an excessive surge at the analog input pins (AN0 to AN11) and analog
reference power supply (Vref) should be connected between AVCC and AVSS as shown in
figure 17-7.
Also, the bypass capacitors connected to AVCC and Vref and the filter capacitor connected to
AN0 to AN11 must be connected to AVSS.
If a filter capacitor is connected as shown in figure 17-7, the input currents at the analog input pins
(AN0 to AN11) are averaged, and so an error may arise. Also, when A/D conversion is performed
frequently, as in scan mode, if the current charged and discharged by the capacitance of the
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 699 of 1458