HD64F2638F20J Datasheet, PDF (1184/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix A Instruction Set
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Instruction
ROTXL
ROTXR
RTE
RTS
SHAL
SHAR
SHLL
SHLR
SLEEP
STC
STM
STMAC
HNZ VC
—
0
—
0
—————
—
—
0
—
0
—0
0
—————
—————
—————
—
—
Definition
N = Rm
Z = Rm · Rm–1 · ^...... · R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
N = Rm
Z = Rm · Rm–1 · ^...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
Stores the corresponding bits of the result.
N = Rm
Z = Rm · Rm–1 · ^...... · R0
V = Dm · Dm–1 + Dm · Dm–1 (1-bit shift)
V = Dm · Dm–1 · Dm–2 · Dm · Dm–1 · Dm–2 (2-bit shift)
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
N = Rm
Z = Rm · Rm–1 · ^...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
N = Rm
Z = Rm · Rm–1 · ^...... · R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
N = Rm
Z = Rm · Rm–1 · ^...... · R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
N = 1 if MAC instruction resulted in negative value in MAC
register
Z = 1 if MAC instruction resulted in zero value in MAC
register
V = 1 if MAC instruction resulted in overflow
Page 1134 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010