HD64F2638F20J Datasheet, PDF (581/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 14 Smart Card Interface
The method of calculating the value to be set in the bit rate register (BRR) from the operating
frequency and bit rate, on the other hand, is shown below. N is an integer, 0 ≤ N ≤ 255, and the
smaller error is specified.
N=
φ
× 10⁶ – 1
S × 2²ⁿ⁺¹ × B
Table 14-6 Examples of BRR Settings for Bit Rate B (bit/s) (When n = 0 and S = 372)
φ (MHz)
7.1424
10.00
10.7136
13.00
14.2848
16.00
18.00
20.00
bit/s N Error N Error N Error N Error N Error N Error N Error N Error
9600 0 0.00 1 30 1 25 1 8.99 1 0.00 1 12.01 2 15.99 2 6.60
Note: A blank means no setting is available.
Table 14-7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)
(when S = 372)
φ (MHz)
Maximum Bit Rate (bit/s)
N
n
7.1424
9600
0
0
10.00
13441
0
0
10.7136
14400
0
0
13.00
17473
0
0
14.2848
19200
0
0
16.00
21505
0
0
18.00
24194
0
0
20.00
26882
0
0
The bit rate error is given by the following formula:
Error (%) = (
φ
× 10⁶ – 1) × 100
S × 2²ⁿ⁺¹ × B × (N + 1)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 531 of 1458