HD64F2638F20J Datasheet, PDF (349/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 9 I/O Ports
9.12.2 Register Configuration
Table 9-22 shows the port H register configuration.
Table 9-22 Port H Registers
Name
Port H data direction register
Port H data register
Port H register
Note: * Lower 16 bits of the address.
Abbreviation R/W
PHDDR
W
PHDR
RW
PORTH
R
Initial Value
H'00
H'00
Undefined
Address^*
H'FC20
H'FC24
H'FC28
Port H Data Direction Register (PHDDR)
Bit
:
7
6
5
4
3
2
1
0
PH7DDR PH6DDR PH5DDR PH4DDR PH3DDR PH2DDR PH1DDR PH0DDR
Initial value :
0
0
0
0
0
0
0
0
R/W
:W
W
W
W
W
W
W
W
PHDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port H. PHDDR cannot be read. If it is, an undefined value will be read.
PHDDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port H Data Register (PHDR)
Bit
:
Initial value :
R/W
:
7
PH7DR
0
R/W
6
PH6DR
0
R/W
5
PH5DR
0
R/W
4
PH4DR
0
R/W
3
PH3DR
0
R/W
2
PH2DR
0
R/W
1
PH1DR
0
R/W
0
PH0DR
0
R/W
PHDR is an 8-bit readable/writeable register that stores output data for the port H pins (PH7 to
PH0).
PHDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 299 of 1458