HD64F2638F20J Datasheet, PDF (1018/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 23B Power-Down Modes [HD64F2636UF, HD6432636UF, HD64F2638UF, HD6432638UF,
HD64F2638WF, HD6432638WF, HD64F2639UF, HD6432639UF, HD64F2639WF, HD6432639WF,
HD64F2630UF, HD6432630UF, HD64F2630WF, HD6432630WF, HD6432635F, HD64F2635F, HD6432634F]
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Table 23B-6 Oscillation Stabilization Time Settings
STS2 STS1 STS0 Standby Time
20 16 12 10 8
6
5
4
MHz MHz MHz MHz MHz MHz MHz MHz Unit
0
0
0
8192 states
0.41 0.51 0.68 0.8 1.0 1.3 1.6 2.0 ms
1
16384 states
0.82 1.0 1.3 1.6 2.0 2.7 3.2 4.1
1
0
32768 states
1.6 2.0 2.7 3.3 4.1 5.5 6.5 8.2
1
65536 states
3.3 4.1 5.5 6.6 8.2 10.9 13.1 16.4
1
0
0
131072 states
6.6
8.2 10.9 13.1 16.4 21.8 26.2 32.8
1
262144 states
13.1 16.4 21.8 26.2 32.8 43.6 52.4 65.6
1
0
Reserved
— — — — — — — — µs
1
16 states
0.8 1.0 1.3 1.6 2.0 2.6 3.2 4.0
(Setting prohibited)
: Recommended time setting
2. Setting for H8S/2635, H8S/2634
Set bits STS2 to STS0 so that the standby time is at least 12 ms (the oscillation stabilization
time).
Table 23B-7 shows the standby times for different operating frequencies and settings of bits
STS2 to STS0.
Table 23B-7 Oscillation Stabilization Time Settings
STS2 STS1 STS0 Standby Time
20 MHz 16 MHz 10 MHz 8 MHz 5 MHz 4 MHz Unit
0
0
0
8192 states
0.41 0.51 0.8
1.0
1.6
2.0
ms
1
16384 states
0.82 1.0
1.6
2.0
3.2
4.1
1
0
32768 states
1.6
2.0
3.3
4.1
6.5
8.2
1
65536 states
3.3
4.1
6.6
8.2
13.1 16.4
1
0
0
131072 states
6.6
8.2
13.1 16.4 26.2 32.8
1
262144 states
13.1 16.4 26.2 32.8 52.4 65.6
1
0
Reserved
—
—
—
—
—
—
µs
1
16 states
0.8
1.0
1.6
2.0
3.2
4.0
(Setting prohibited)
: Recommended time setting
Using an External Clock: The PLL circuit requires time to stabilize, so the standby time should
be set to a value of 2 ms or more.
Page 968 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010