HD64F2638F20J Datasheet, PDF (691/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 16 Controller Area Network (HCAN)
16.2.16 Unread Message Status Register (UMSR)
The unread message status register (UMSR) is a 16-bit readable/writable register containing status
flags that indicate, for individual mailboxes (buffers), that a received message has been
overwritten by a new receive message before being read. When a message is overwritten by a new
receive message, the old data is lost.
UMSR
Bit:
Initial value:
R/W:
15
UMSR7
0
R/(W)^*
14
UMSR6
0
R/(W)^*
13
UMSR5
0
R/(W)^*
12
UMSR4
0
R/(W)^*
11
UMSR3
0
R/(W)^*
10
UMSR2
0
R/(W)^*
9
UMSR1
0
R/(W)^*
8
UMSR0
0
R/(W)^*
Bit: 7
6
5
4
3
2
1
UMSR15 UMSR14 UMSR13 UMSR12 UMSR11 UMSR10 UMSR9
Initial value: 0
0
0
0
0
0
0
R/W: R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^* R/(W)^*
0
UMSR8
0
R/(W)^*
Note: * Only 1 can be written, to clear the flag to 0.
Bits 15 to 0—Unread Message Status Flags (UMSRx): Status flags indicating that an unread
receive message has been overwritten.
Bit x: UMSRx
0
1
Description
[Clearing condition]
• Writing 1
(Initial value)
Unread receive message is overwritten by a new message
[Setting condition]
• When a new message is received before RXPR is cleared
(x = 15 to 0)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 641 of 1458