HD64F2638F20J Datasheet, PDF (1356/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
PWBFR1A—PWM Buffer Register 1A
PWBFR1C—PWM Buffer Register 1C
PWBFR1E—PWM Buffer Register 1E
PWBFR1G—PWM Buffer Register 1G
H'FC08
H'FC0A
H'FC0C
H'FC0E
PWM1
PWM1
PWM1
PWM1
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
⎯ ⎯ ⎯ OTS ⎯ ⎯ DT9 DT8 DT7 DT6 DT5 DT4 DT3 DT2 DT1 DT0
Initial value 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0
Read/Write ⎯ ⎯ ⎯ R/W ⎯ ⎯ R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Output Terminal Select
Bit 12 is the data transferred to
bit 12 of PWDTR1
Duty
Bits 9 to 0 comprise the data transferred to
bits 9 to 0 in PWDTR1
Register
PWDTR1A
PWDTR1C
PWDTR1E
PWDTR1G
OTS
0
1
0
1
0
1
0
Description
PWM1A output selected
PWM1B output selected
PWM1C output selected
PWM1D output selected
PWM1E output selected
PWM1F output selected
PWM1G output selected
1
PWM1H output selected
Note: When a PWCYR1 compare match occurs, data is transferred from PWBFR1A to PWDTR1A,
from PWBFR1C to PWDTR1C, from PWBFR1E to PWDTR1E, and from PWBFR1G to
PWDTR1G.
Page 1306 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010