HD64F2638F20J Datasheet, PDF (465/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 11 Programmable Pulse Generator (PPG)
11.3.3 Normal Pulse Output
Sample Setup Procedure for Normal Pulse Output: Figure 11-4 shows a sample procedure for
setting up normal pulse output.
TPU setup
Port and
PPG setup
TPU setup
Normal PPG output
Select TGR functions
[1]
Set TGRA value
[2]
Set counting operation [3]
Select interrupt request [4]
Set initial output data
[5]
Enable pulse output
[6]
Select output trigger
[7]
Set next pulse
[8]
output data
Start counter
Compare match?
Yes
Set next pulse
output data
[9]
No
[10]
[1] Set TIOR to make TGRA an output
compare register (with output
disabled)
[2] Set the PPG output trigger period
[3] Select the counter clock source
with bits TPSC2 to TPSC0 in TCR.
Select the counter clear source
with bits CCLR1 and CCLR0.
[4] Enable the TGIA interrupt in TIER.
The DTC can also be set up to
transfer data to NDR.
[5] Set the initial output values in
PODR.
[6] Set the DDR and NDER bits for the
pins to be used for pulse output to 1.
[7] Select the TPU compare match
event to be used as the output
trigger in PCR.
[8] Set the next pulse output values in
NDR.
[9] Set the CST bit in TSTR to 1 to
start the TCNT counter.
[10] At each TGIA interrupt, set the next
output values in NDR.
Figure 11-4 Setup Procedure for Normal Pulse Output (Example)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 415 of 1458