HD64F2638F20J Datasheet, PDF (1473/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Appendix C I/O Port Block Diagrams
P1n
*1
Reset
R
Q
D
P1nDDR
C
WDDR1
Reset
R
Q
D
P1nDR
C
WDR1
RDR1
System controller
Address output enable
PPG module^*2
Pulse output enable
Pulse output
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RPOR1
Input capture input
External clock input
Legend:
WDDR1: Write to P1DDR
WDR1: Write to P1DR
RDR1: Read P1DR
RPOR1: Read port 1
n = 2 or 3
Notes: 1. Priority order: Address output > output compare output/PWM output > pulse output > DR output
2. The PPG module is not implemented in the H8S/2635 Group.
Figure C-1 (b) Port 1 Block Diagram (Pins P12 and P13)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
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