HD64F2638F20J Datasheet, PDF (184/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
5.6.3 Operation
The interrupt controller has three main functions in DTC control.
(1) Selection of Interrupt Source: Interrupt factors are selected as DTC activation request or
CPU interrupt request by the DTCE bit of DTCERA to DTCERG of DTC.
By specifying the DISEL bit of the DTC’s MRB, it is possible to clear the DTCE bit to 0 after
DTC data transfer, and request a CPU interrupt.
If DTC carries out the designate number of data transfers and the transfer counter reads 0, after
DTC data transfer, the DTCE bit is also cleared to 0, and a CPU interrupt requested.
(2) Determination of Priority: The DTC activation source is selected in accordance with the
default priority order, and is not affected by mask or priority levels. See section 8.3.3, DTC Vector
Table for the respective priority.
(3) Operation Order: If the same interrupt is selected as a DTC activation source and a CPU
interrupt source, the DTC data transfer is performed first, followed by CPU interrupt exception
handling.
Table 5-11 shows the interrupt factor clear control and selection of interrupt factors by
specification of the DTCE bit of DTCERA to DTCERG of DTC, and the DISEL bit of DTC’s
MRB.
Page 134 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010