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HD64F2638F20J Datasheet, PDF (1073/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 24 Electrical Characteristics
(3) Bus Timing
Table 24-29 lists the bus timing.
Table 24-29 Bus Timing
Conditions: VCC = 4.5 V to 5.5 V, PWMVCC = 4.5 V to 5.5 V, AVCC = 4.5 V to 5.5 V,
Vref = 4.5 V to AVCC, VSS = PWMVSS = PLLVSS = AVSS = 0 V,
Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range
specifications)
Item
Address delay time
Address setup time
Address hold time
AS delay time
RD delay time 1
RD delay time 2
Read data setup time
Read data hold time
Read data access time1
Read data access time2
Read data access time3
Read data access time 4
Read data access time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
Write data delay time
Write data setup time
Write data hold time
Symbol
tAD
tAS
tAH
tASD
tRSD1
tRSD2
tRDS
tRDH
tACC1
tACC2
tACC3
tACC4
tACC5
tWRD1
tWRD2
tWSW1
tWSW2
tWDD
tWDS
tWDH
Condition
Min.
Max.
—
35
0.5 × tcyc – 20 —
0.5 × tcyc – 15 —
—
20
—
20
—
20
20
—
0
—
—
1.0 × tcyc – 48
—
1.5 × tcyc – 45
—
2.0 × tcyc – 45
—
2.5 × tcyc – 45
—
3.0 × tcyc – 50
—
20
—
20
1.0 × tcyc – 20 —
1.5 × tcyc – 20 —
—
30
0.5 × tcyc – 20 —
0.5 × tcyc – 10 —
Unit Test Conditions
ns Figure 24-13 to
ns Figure 24-17
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REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1023 of 1458