HD64F2638F20J Datasheet, PDF (228/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 7 Bus Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
7.4.5 Wait Control
When accessing external space, the chip can extend the bus cycle by inserting one or more wait
states (T_w). There are two ways of inserting wait states: program wait insertion.
Program Wait Insertion
From 0 to 3 wait states can be inserted automatically between the T₂ state and T₃ state on an
individual area basis in 3-state access space, according to the settings of WCRH and WCRL.
Figure 7-13 shows an example of wait state insertion timing.
By program wait
T₁
T₂
T_w
T_w
T_w
T₃
φ
Address bus
AS
Read
RD
Data bus
Read data
Write
HWR, LWR
Data bus
Write data
Figure 7-13 Example of Wait State Insertion Timing
The settings after a reset are: 3-state access, 3 program wait state insertion.
Page 178 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010