HD64F2638F20J Datasheet, PDF (771/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 19 Motor Control PWM Timer
19.2.3 PWM Polarity Registers 1 and 2 (PWPR1, PWPR2)
PWPR1
Bit
Initial value
Read/Write
7
OPS1H
0
R/W
6
OPS1G
0
R/W
5
OPS1F
0
R/W
4
OPS1E
0
R/W
3
OPS1D
0
R/W
2
OPS1C
0
R/W
1
OPS1B
0
R/W
0
OPS1A
0
R/W
PWPR2
Bit
Initial value
Read/Write
7
OPS2H
0
R/W
6
OPS2G
0
R/W
5
OPS2F
0
R/W
4
OPS2E
0
R/W
3
OPS2D
0
R/W
2
OPS2C
0
R/W
1
OPS2B
0
R/W
0
OPS2A
0
R/W
PWPR is an 8-bit read/write register that selects the PWM output polarity. PWPR1 controls
outputs PWM1H to PWM1A, and PWPR2 controls outputs PWM2H to PWM2A.
PWPR is initialized to H'00 upon reset, and in standby mode, watch mode*, subactive mode*,
subsleep mode*, and module stop mode.
Note: * Subclock functions (subactive mode, subsleep mode, and watch mode) are available in the
U-mask and W-mask versions, and H8S/2635 Group only.
These functions cannot be used with the other versions.
Bits 7 to 0—Output Polarity Select (OPS): Each of these bits selects the polarity of the
corresponding PWM output.
Bits 7 to 0:
OPS
0
1
Description
PWM direct output
PWM inverse output
(Initial value)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 721 of 1458