HD64F2638F20J Datasheet, PDF (642/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 15 I²C Bus Interface [Option]
(Only for the H8S/2638, H8S/2639, and H8S/2630)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
15.3.6 Slave Transmit Operation
In slave transmit operation, the slave device compares its own address with the slave address
transmitted by the master device in the first frame (address receive frame) following detection of
the start condition. If the addresses match and the 8th bit (R/W) is set to 1 (read), the TRS bit in
ICCR is automatically set to 1 and slave transmit mode is activated.
Figure 15-17 is a flowchart showing an example of slave transmit mode operation.
Slave transmit mode
Clear IRIC in ICCR
Write transmit data in ICDR
Clear IRIC in ICCR
Read IRIC in ICCR
[1] Set transmit data for the second and
subsequent bytes
[1]
[2] Wait for 1 byte to be transmitted
[3] Test for end of transfer
[4] Select slave receive mode
[5] Dummy read (to release the SCL line)
No
[2]
IRIC = 1?
Yes
Read ACKB in ICSR
[3]
End
No
of transmission
(ACKB = 1)?
Yes
Set TRS = 0 in ICCR
[4]
Read ICDR
[5]
Clear IRIC in ICCR
End
Figure 15-17 Flowchart for Slave Receive Mode (Example)
Page 592 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010