HD64F2638F20J Datasheet, PDF (683/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 16 Controller Area Network (HCAN)
Bit 11—Transmit Overload Warning Interrupt Flag (IRR3): Status flag indicating the error
warning state caused by the transmit error counter.
Bit 11: IRR3
0
1
Description
[Clearing condition]
• Writing 1
Error warning state caused by transmit error
[Setting condition]
• When TEC ≥ 96
(Initial value)
Bit 10—Remote Frame Request Interrupt Flag (IRR2): Status flag indicating that a remote
frame has been received in a mailbox (buffer).
Bit 10: IRR2
0
1
Description
[Clearing condition]
• Clearing of all bits in RFPR (remote request register) of mailbox for
which receive interrupt requests are enabled by MBIMR (Initial value)
Remote frame received and stored in mailbox
[Setting condition]
• When remote frame reception is completed, when corresponding
MBIMR = 0
Bit 9—Receive Message Interrupt Flag (IRR1): Status flag indicating that a mailbox (buffer)
receive message has been received normally.
Bit 9: IRR1
0
1
Description
[Clearing condition]
• Clearing of all bits in RXPR (receive complete register) of mailbox for
which receive interrupt requests are enabled by MBIMR (Initial value)
Data frame or remote frame received and stored in mailbox
[Setting condition]
• When data frame or remote frame reception is completed, when
corresponding MBIMR = 0
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 633 of 1458