HD64F2638F20J Datasheet, PDF (156/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
5.1.2 Block Diagram
A block diagram of the interrupt controller is shown in figure 5-1.
SYSCR
NMI input
IRQ input
INTM1, INTM0
NMIEG
NMI input unit
IRQ input unit
ISR
ISCR IER
Priority
determination
Internal interrupt
request
SWDTEND to
RM0
IPR
Interrupt controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
CPU
Interrupt
request
Vector
number
I
I2 to I0
CCR
EXR
Legend:
ISCR: IRQ sense control register
IER: IRQ enable register
ISR: IRQ status register
IPR: Interrupt priority register
SYSCR: System control register
Figure 5-1 Block Diagram of Interrupt Controller
Page 106 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010