HD64F2638F20J Datasheet, PDF (1216/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
TXCR0—Transmit Wait Cancel Register
TXCR1—Transmit Wait Cancel Register
H'F808
H'FA08
HCAN0
HCAN1^*
Bit
15
14
13
12
11
10
9
8
TXCR7 TXCR6 TXCR5 TXCR4 TXCR3 TXCR2 TXCR1 ⎯
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
TXCR15 TXCR14 TXCR13 TXCR12 TXCR11 TXCR10 TXCR9
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
TXCR8
0
R/W
Transmit Wait Cancel Register
0 Transmit message cancellation idle state in corresponding mailbox
[Clearing condition]
• Completion of TXPR clearing
(when transmit message is canceled normally)
1 TXPR cleared for corresponding mailbox
(transmit message cancellation)
Note: * This register is not available in the H8S/2635 Group.
TXACK0—Transmit Acknowledge Register
TXACK1—Transmit Acknowledge Register
H'F80A
H'FA04
HCAN0
HCAN1^*
Bit
15
14
13
12
11
10
9
8
TXACK7 TXACK6 TXACK5 TXACK4 TXACK3 TXACK2 TXACK1 ⎯
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Bit
7
6
5
4
3
2
1
0
TXACK15 TXACK14 TXACK13 TXACK12 TXACK11 TXACK10 TXACK9 TXACK8
Initial value
0
0
0
0
0
0
0
0
Read/Write R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Transmit Acknowledge Register
0 [Clearing condition]
• Writing 1
1 Completion of message transmission for
corresponding mailbox
Note: * This register is not available in the H8S/2635 Group.
Page 1166 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010