HD64F2638F20J Datasheet, PDF (250/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 8 Data Transfer Controller (DTC)
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
8.3 Operation
8.3.1 Overview
When activated, the DTC reads register information that is already stored in memory and transfers
data on the basis of that register information. After the data transfer, it writes updated register
information back to memory. Pre-storage of register information in memory makes it possible to
transfer data over any required number of channels. Setting the CHNE bit to 1 makes it possible to
perform a number of transfers with a single activation.
Figure 8-2 shows a flowchart of DTC operation.
Start
Read DTC vector
Next transfer
Read register information
Data transfer
Write register information
CHNE =1
Yes
No
Transfer Counter= 0
or DISEL = 1
Yes
No
Clear an activation flag
Clear DTCER
End
Interrupt exception
handling
Figure 8-2 Flowchart of DTC Operation
Page 200 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010