HD64F2638F20J Datasheet, PDF (732/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 17 A/D Converter
17.1.2 Block Diagram
Figure 17-1 shows a block diagram of the A/D converter.
Module data bus
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Internal data bus
AVCC
Vref
AVSS
10-bit D/A
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
+
φ/2
−
φ/4
Comparator
Control circuit
φ/8
Sample-and-
hold circuit
φ/16
ADTRG
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
ADI
interrupt
Conversion start
trigger from TPU
Figure 17-1 Block Diagram of A/D Converter
Page 682 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010