HD64F2638F20J Datasheet, PDF (1212/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Appendix B Internal I/O Register
MCR0—Master Control Register
MCR1—Master Control Register
Bit
7
6
5
4
MCR7
⎯
MCR5
⎯
Initial value
0
0
0
0
Read/Write R/W
R
R/W
R
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
H'F800
H'FA00
HCAN0
HCAN1^*
3
2
1
0
⎯ MCR2 MCR1 MCR0
0
0
0
1
R
R/W
R/W
R/W
Reset Request
0 Normal operating mode
(MCR0 = 0 and GSR3 = 0)
[Setting condition]
• When 0 is written after an
HCAN reset
1 HCAN reset mode transition
request
Halt Request
0 HCAN normal operating mode
1 HCAN halt mode transition request
Message Transmission Method
0 Transmission order determined by message
identifier priority
1 Transmission order determined by mailbox
(buffer) number priority
(TXPR1 > TXPR15)
HCAN Sleep Mode
0 HCAN sleep mode released
1 Transition to HCAN sleep mode enabled
HCAN Sleep Mode Release
0 HCAN sleep mode release by CAN bus operation disabled
1 HCAN sleep mode release by CAN bus operation enabled
Note: * This register is not available in the H8S/2635 Group.
Page 1162 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010