HD64F2638F20J Datasheet, PDF (1043/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 24 Electrical Characteristics
Item
Symbol Min. Typ. Max. Unit
Test Condition
Erase
Wait time after H'FF dummy
tsevr
write^*1
Wait time after EV bit clear^*1
tcev
Wait time after SWE bit clear^*1 tcswe
Maximum erase count^{*1 *5}
N
2
2
— µs
4
4
— µs
100 100 — µs
12 — 120 Times
Notes: 1. Make each time setting in accordance with the program/program-verify flowchart or
erase/erase-verify flowchart.
2. Programming time per 128 bytes (Shows the total period for which the P-bit in the flash
memory control register (FLMCR1) is set. It does not include the programming
verification time)
3. Block erase time (Shows the total period for which the E-bit in FLMCR1 is set. It does
not include the erase verification time)
4. To specify the maximum programming time value (tP (max.)) in the 128-byte
programming algorithm, set the max. value (1000) for the maximum programming count
(N).
The wait time after P bit setting should be changed as follows according to the value of
the programming counter (n).
Programming counter (n) = 1 to 6:
tsp30 = 30 µs
Programming counter (n) = 7 to 1000: tsp200 = 200 µs
[In additional programming]
Programming counter (n)= 1 to 6:
tsp10 = 10 µs
5. For the maximum erase time (tE (max.), the following relationship applies between the
wait time after E bit setting (tse) and the maximum erase count (N):
tE (max.) = Wait time after E bit setting (tse) x maximum erase count (N)
To set the maximum erase time, the values of (tse) and (N) should be set so as to satisfy
the above formula.
Examples: When tse = 100 [ms], N = 12 times
When tse = 10 [ms], N = 120 times
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 993 of 1458