HD64F2638F20J Datasheet, PDF (162/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Section 5 Interrupt Controller
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
5.2.5 IRQ Status Register (ISR)
Bit
:
Initial value :
R/W
:
7
⎯
0
R/(W)*
6
⎯
0
R/(W)*
5
IRQ5F
0
R/(W)*
4
IRQ4F
0
R/(W)*
3
IRQ3F
0
R/(W)*
2
IRQ2F
0
R/(W)*
1
IRQ1F
0
R/(W)*
0
IRQ0F
0
R/(W)*
Note: * Only 0 can be written, to clear the flag.
ISR is an 8-bit readable/writable register that indicates the status of IRQ5 to IRQ0 interrupt
requests.
ISR is initialized to H'00 by a reset and in hardware standby mode.
They are not initialized in software standby mode.
Bits 7 and 6—Reserved: These bits are always read as 0.
Bits 5 to 0—IRQ5 to IRQ0 Flags (IRQ5F to IRQ0F): These bits indicate the status of IRQ5 to
IRQ0 interrupt requests.
Page 112 of 1458
REJ09B0103-0800 Rev. 8.00
May 28, 2010