HD64F2638F20J Datasheet, PDF (693/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 16 Controller Area Network (HCAN)
LAFMH Bits 7 to 0 and 15 to 13—11-Bit Identifier Filter (LAFMH7 to LAFMH5,
LAFMH15 to LAFMH8): Filter mask bits for the first 11 bits of the receive message identifier
(for both standard and extended identifiers).
Bit x: LAFMHx
0
1
Description
Stored in MC0 and MD0 (receive-only mailbox) depending on bit match
between MC0 message identifier and receive message identifier
(Initial value)
Stored in MC0 and MD0 (receive-only mailbox) regardless of bit match
between MC0 message identifier and receive message identifier
(x = 15 to 5)
LAFMH Bits 12 to 10—Reserved: These bits always read 0. The write value should always be 0.
LAFMH Bits 9 and 8, LAFML Bits 15 to 0—18-Bit Identifier Filter (LAFMH1, LAFMH0,
LAFML7 to LAFML0, LAFML15 to LAFML8): Filter mask bits for the 18 bits of the receive
message identifier (extended).
Bit y: LAFMHx
LAFMLy
0
1
Description
Stored in MC0 (receive-only mailbox) depending on bit match between MC0
message identifier and receive message identifier
(Initial value)
Stored in MC0 (receive-only mailbox) regardless of bit match between MC0
message identifier and receive message identifier
(x = 1 and 0, y = 15 to 0)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 643 of 1458