HD64F2638F20J Datasheet, PDF (449/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 11 Programmable Pulse Generator (PPG)
Section 11 Programmable Pulse Generator (PPG)
Note: The H8S/2635 Group is not equipped with a PPG.
11.1 Overview
The chip has an on-chip programmable pulse generator (PPG) that provides pulse outputs by using
the 16-bit timer-pulse unit (TPU) as a time base. The PPG pulse outputs are divided into 4-bit
groups (group 3 and group 2) that can operate both simultaneously and independently.
11.1.1 Features
PPG features are listed below.
• 8-bit output data
⎯ Maximum 8-bit data can be output, and output can be enabled on a bit-by-bit basis
• Two output groups
⎯ Output trigger signals can be selected in 4-bit groups to provide up to two different 4-bit
outputs
• Selectable output trigger signals
⎯ Output trigger signals can be selected for each group from the compare match signals of
four TPU channels
• Non-overlap mode
⎯ A non-overlap margin can be provided between pulse outputs
• Can operate together with the data transfer controller (DTC)
⎯ The compare match signals selected as output trigger signals can activate the DTC for
sequential output of data without CPU intervention
• Settable inverted output
⎯ Inverted data can be output for each group
• Module stop mode can be set
⎯ As the initial setting, PPG operation is halted. Register access is enabled by exiting module
stop mode
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 399 of 1458