HD64F2638F20J Datasheet, PDF (1395/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Appendix B Internal I/O Register
TIOR4—Timer I/O Control Register 4
Bit
Initial value
Read/Write
7
IOB3
0
R/W
6
IOB2
0
R/W
5
IOB1
0
R/W
H'FE92
4
IOB0
0
R/W
3
IOA3
0
R/W
2
IOA2
0
R/W
1
IOA1
0
R/W
TPU4
0
IOA0
0
R/W
TGR4A I/O Control
00
0 0 TGR4A is Output disabled
1 ^output
Initial output is 0
1
compare
0 _register
output
1
0 output at compare match
1 output at compare match
Toggle output at compare match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR4A is Capture input
Input capture at rising edge
1 ^input
capture
1 * _register
source is
TIOCA4 pin
Input capture at falling edge
Input capture at both edges
1* *
Capture input Input capture at generation of TGR3A
source is TGR3A compare match/input capture
compare match/
input capture
*: Don't care
TGR4B I/O Control
0 0 0 0 TGR4B is Output disabled
1 ^output
Initial output is 0
1
compare
0 _register
output
1
0 output at compare match
1 output at compare match
Toggle output at compare match
100
Output disabled
1
10
Initial output is 1 0 output at compare match
output
1 output at compare match
1
Toggle output at compare match
1 0 0 0 TGR4B is Capture input
Input capture at rising edge
1 ^input
capture
1 * _register
source is
TIOCB4 pin
Input capture at falling edge
Input capture at both edges
1* *
Capture input Input capture at generation of TGR3C
source is TGR3C compare match/input capture
compare match/
input capture
*: Don't care
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 1345 of 1458