HD64F2638F20J Datasheet, PDF (611/1512 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Section 15 I²C Bus Interface [Option]
(Only for the H8S/2638, H8S/2639, and H8S/2630)
Bit 5
MST
0
1
Description
Slave mode
(Initial value)
[Clearing conditions]
(1) When 0 is written by software
(2) When bus arbitration is lost after transmission is started in I²C bus format master
mode
Master mode
[Setting conditions]
(1) When 1 is written by software (in cases other than clearing condition (2))
(2) When 1 is written in MST after reading MST = 0 (in case of clearing condition (2))
Bit 4
TRS
0
1
Description
Receive mode
(Initial value)
[Clearing conditions]
(1) When 0 is written by software (in cases other than setting condition (3))
(2) When 0 is written in TRS after reading TRS = 1 (in case of clearing condition (3))
(3) When bus arbitration is lost after transmission is started in I²C bus format master
mode
Transmit mode
[Setting conditions]
(1) When 1 is written by software (in cases other than clearing conditions (3) and 4)
(2) When 1 is written in TRS after reading TRS = 0 (in case of clearing conditions (3)
and 4)
(3) When a 1 is received as the R/W bit of the first frame in I²C bus format slave mode
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Page 561 of 1458